{"id":7805,"date":"2020-12-06T19:25:22","date_gmt":"2020-12-06T18:25:22","guid":{"rendered":"https:\/\/monodes.com\/predaelli\/?p=7805"},"modified":"2020-12-06T19:25:22","modified_gmt":"2020-12-06T18:25:22","slug":"un-chip-risc-v-promette-di-demolire-apple-m1-ecco-chi-ce-dietro-e-di-cosa-si-tratta","status":"publish","type":"post","link":"https:\/\/monodes.com\/predaelli\/2020\/12\/06\/un-chip-risc-v-promette-di-demolire-apple-m1-ecco-chi-ce-dietro-e-di-cosa-si-tratta\/","title":{"rendered":"Un chip RISC-V promette di demolire Apple M1. Ecco chi c’\u00e8 dietro e di cosa si tratta"},"content":{"rendered":"

\"\"<\/a>La californiana Micro Magic afferma di aver messo a punto un core basato su ISA RISC-V che non teme confronti, nemmeno l’interessantissimo Apple M1 su base ARM, grazie a frequenze intorno ai 5 GHz e consumi estremamente ridotti.<\/p><\/blockquote>\n

Un chip RISC-V promette di demolire Apple M1. Ecco chi c’\u00e8 dietro e di cosa si tratta<\/a><\/em><\/h1>\n

A me basterebbe che siano anche “solo” all’altezza dell’M1<\/p>\n","protected":false},"excerpt":{"rendered":"

La californiana Micro Magic afferma di aver messo a punto un core basato su ISA RISC-V che non teme confronti, nemmeno l’interessantissimo Apple M1 su base ARM, grazie a frequenze intorno ai 5 GHz e consumi estremamente ridotti. Un chip RISC-V promette di demolire Apple M1. Ecco chi c’\u00e8 dietro e di cosa si tratta…<\/p>\n

Read more →<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"inline_featured_image":false,"jetpack_post_was_ever_published":false,"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_memberships_contains_paid_content":false,"activitypub_content_warning":"","activitypub_content_visibility":"","activitypub_max_image_attachments":4,"activitypub_interaction_policy_quote":"anyone","activitypub_status":"","footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":true,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[80,239],"tags":[],"class_list":["post-7805","post","type-post","status-publish","format-standard","hentry","category-hardware","category-risc-v"],"jetpack_publicize_connections":[],"jetpack_featured_media_url":"","jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/p6daft-21T","jetpack-related-posts":[{"id":9233,"url":"https:\/\/monodes.com\/predaelli\/2022\/04\/02\/the-first-risc-v-portable-computer-is-now-available\/","url_meta":{"origin":7805,"position":0},"title":"The first RISC-V portable computer is now available","author":"Paolo Redaelli","date":"2022-04-02","format":false,"excerpt":"The DevTerm R-01 is a RISC-V based \"slabtop\" computer. The first RISC-V portable computer is now available Well, it's not exactly on par on Apple M1, but this machine fills an entirely different niche. \u00a0","rel":"","context":"In "Hardware"","block_context":{"text":"Hardware","link":"https:\/\/monodes.com\/predaelli\/category\/hardware\/"},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":7876,"url":"https:\/\/monodes.com\/predaelli\/2020\/12\/21\/will-its-magic-be-back\/","url_meta":{"origin":7805,"position":1},"title":"Will its magic be back?","author":"Paolo Redaelli","date":"2020-12-21","format":"link","excerpt":"Apple M1 foreshadows Rise of RISC-V I dearly hope that we will soon have a RISC-V based, massively parallel and with many specialized coprocessors. The magic of Amiga will soon be back, updated for the 21th century.","rel":"","context":"In "Amiga"","block_context":{"text":"Amiga","link":"https:\/\/monodes.com\/predaelli\/category\/amiga\/"},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":8971,"url":"https:\/\/monodes.com\/predaelli\/2021\/12\/09\/intels-secret-plan-to-neutralize-arm\/","url_meta":{"origin":7805,"position":2},"title":"Intel\u2019s Secret Plan to Neutralize ARM","author":"Paolo Redaelli","date":"2021-12-09","format":false,"excerpt":"Erik Engheim was pondering on Intel\u2019s Secret Plan to Neutralize ARM | CodeX. I think he missed an important point, namely the fact that RISC-V is an open standard: Unlike most other ISA designs, the RISC-V ISA is provided under open source licenses that do not require fees to use\u2026","rel":"","context":"In "Senza categoria"","block_context":{"text":"Senza categoria","link":"https:\/\/monodes.com\/predaelli\/category\/senza-categoria\/"},"img":{"alt_text":"Erik Engheim","src":"https:\/\/i0.wp.com\/monodes.com\/predaelli\/wp-content\/uploads\/sites\/4\/2021\/12\/01Y9ylHZ8csOxgZr7.jpg?resize=350%2C200&ssl=1","width":350,"height":200},"classes":[]},{"id":9740,"url":"https:\/\/monodes.com\/predaelli\/2022\/10\/16\/ox64-the-8-risc-v-single-board-computer\/","url_meta":{"origin":7805,"position":3},"title":"Ox64: the 8$ RISC-V single board computer","author":"Paolo Redaelli","date":"2022-10-16","format":false,"excerpt":"Ox64 \u2013 a sub $10 Linux capable single board computer from Pine64 people. For 8$ you get 3 RISC-V cores: 64-bit, 32-bit and low power core, plus 64Mb of RAM. That's interesting!","rel":"","context":"In "Hardware"","block_context":{"text":"Hardware","link":"https:\/\/monodes.com\/predaelli\/category\/hardware\/"},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":5226,"url":"https:\/\/monodes.com\/predaelli\/2019\/02\/14\/you-can-now-build-a-risc-v-pc-that-runs-fedora-linux-with-an-fpga\/","url_meta":{"origin":7805,"position":4},"title":"You Can Now Build a RISC-V PC That Runs Fedora Linux with an FPGA","author":"Paolo Redaelli","date":"2019-02-14","format":"status","excerpt":"https:\/\/blog.hackster.io\/you-can-now-build-a-risc-v-pc-that-runs-fedora-linux-with-an-fpga-97cd5789b28?fbclid=IwAR0TrxxFqWlxARY0y3jSM9su8XOHJMQosBdcdxF05SZvxwaYY7ZSuRZ3k90 I can't wait to see a complete system using RISC-V","rel":"","context":"In "Senza categoria"","block_context":{"text":"Senza categoria","link":"https:\/\/monodes.com\/predaelli\/category\/senza-categoria\/"},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]},{"id":5115,"url":"https:\/\/monodes.com\/predaelli\/2019\/01\/08\/raspberry-pi-becomes-a-member-of-the-risc-v-foundation\/","url_meta":{"origin":7805,"position":5},"title":"Raspberry Pi Becomes a Member of the RISC-V Foundation","author":"Paolo Redaelli","date":"2019-01-08","format":false,"excerpt":"https:\/\/blog.hackster.io\/raspberry-pi-becomes-a-member-of-the-risc-v-foundation-11f06aecc241?fbclid=IwAR02zsBHEyknETTlDPyoiJe_KY8jdRIV8DpdHvI86ieQiI_wtcig4LhEAME I can't wait for it!","rel":"","context":"In "Senza categoria"","block_context":{"text":"Senza categoria","link":"https:\/\/monodes.com\/predaelli\/category\/senza-categoria\/"},"img":{"alt_text":"","src":"","width":0,"height":0},"classes":[]}],"jetpack_likes_enabled":true,"_links":{"self":[{"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/posts\/7805","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/comments?post=7805"}],"version-history":[{"count":0,"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/posts\/7805\/revisions"}],"wp:attachment":[{"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/media?parent=7805"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/categories?post=7805"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/monodes.com\/predaelli\/wp-json\/wp\/v2\/tags?post=7805"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}